Lecture videos
Recorded lecture videos will be posted here during the semester. Visit the course webpage for supplementary content and description of project assignments. The course webpages are published on Github.uio.no and requires login with a UiO username and password.
Content
Programmable logic and FPGA technology
Embedded and real-time systems
Instruction videos related to the project assignments
Programmable logic and FPGA technology
Introduction to programmable logic devices (26:34)* (slides)
Introduction to FPGAs (18:45)* (slides)
Introduction to the I2C interface (11:18) (slides)
VHDL
Background and introduction
A brief historical view (7:03) (slides)
Design units and structure (7:44) (slides)
Description models (19:34) (slides)
Process
Combinational process (8:15)
Combinational Process with simulation and common pitfalls (33:19)
Synchronous process with asynchronous or synchronous reset (28:50)
Statemachines
Introduction to Finite State Machines (12:18) (slides)
Example implementation of a 1-process state machine (11:14)
Simulation of the 1-process state machine (17:42)
Example implementation of a 2-process state machine (9:23)
Simulation of the 2-process state machine (3:16)
Example implementation of a 3-process state machine incl. simulation (13:02)
Test benches
Introduction to packages and subprograms (10:20)
The design flow (06:07) (slides)
Introduction to test benches (27:51) (slides)
Embedded and real-time systems
An introduction to embedded and real-time systems (25:18)* (slides)
Embedded systems and Nios II
The Nios II soft core processor (9:26) (slides)
Hardcore and softcore processors (07:39) (slides)
Memory mapped I/O (7:09) (slides)
The Hardware Abstraction Layer (05:39) (slides)
The Nios II Avalon Interface (11:47) (slides)
Software development for the Nios II processor (19:24) (slides)
RTOS and uC/OS-II
The basic concept of real-time systems (17:44) (slides)
Scheduling (15:15) (slides)
Task states (7:16) (notes)
Context switch (8:15) (notes)
Introduction to uC/OS-II (11:48) (slides)
Time management - The clock tick (07:29) (slides)
Task management - Creating a task (15:51) (slides)
Latency (3:19) (notes)
Jitter (5:38) (notes)
Inter-task communication (03:45) (slides)
Critical section (10:11) (slides)
Semaphores (8:58) (slides)
Example - semaphore (10:59) (slides)
Priority inversion (4:31) (slides)
Priority inheritance (5:21) (slides)
Example - Priority inversion and priority inheritance (6:35) (slides)
Message mailbox (7:52) (slides)
Example - Message mailbox (9:23) (slides)
Message queues (9:22) (slides)
Example - Message queue (5:01) (slides)
Instruction videos related to the project assignments
Getting started with your first project (29:43)
Introduction to the main project assignment (4:11)
Relevant for problem 5
Introduction to the I2C master state machine assignment (20:02)
Relevant for Problem 6
Introduction to the Advanced test bench assignment (19:49)
Relevant for Problem 7
How to build a basic Nios-II system using Quartus Platform Designer (21:21)
Completing the hardware description in the Quartus Prime project (16:32)
Setting up the Software project in the Nios II software Build Tools (SBT) (8:39)
Create the I2C module IP component for the Nios II system (15:58)
Explaining the provided software drivers and setup (7:07)
The ADXL345 accelerometer (incl. how to configure and readout data (14:28) (slides)
Extra
* These videos were initially recorded for FYS3240 during the spring semester of 2020 to provide an introduction to programmable logic devices, FPGAs, and embedded and real-time systems. The content is relevant for both FYS4220 and FYS3240.