IN5180 – Analog Microelectronics Design

Schedule, syllabus and examination date

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Course content

The course provides the know-how and skills needed to design analog CMOS integrated circuits using modern EDA tools. An introduction is given to CMOS technology and methods in order to implement key circuit components such as transistors ans passive components. In addition, matching, optimization and noise are key aspects. A central part of the course will be a design project where students will get a hands-on experience designing a typical CMOS circuit from specification to layout.

Learning outcome

The main learning outcome is the ability to design an advanced integrated circuit / system based on a design specification. In particular you will be able to:

  • Understand key circuits used as building blocks (Amplifiers, Comparators, Voltage References, Sample-and-Hold, Switched-Capacitor Circuits, Oscillators).
  • Build transistor-level schematics based on a design specification.
  • Implement circuits as full custom layouts in CMOS.
  • Understand how production variation will impact design methodology and know how to make circuits robust to such variations.
  • Calculate how noise and non-linearities impact performance and understand fundamental sources of such non-ideal behavior.
  • Use hierarchical design methods and understand how to design circuit interfaces (Voltage Supplies, I/O)

Admission to the course

Students who are admitted to study programmes at UiO must each semester register which courses and exams they wish to sign up for in Studentweb.

If you are not already enrolled as a student at UiO, please see our information about admission requirements and procedures.

IN3170 – Microelectronics, FYS3220 – Linear Circuit Electronics, IN3190 – Digital Signal Processing

Overlapping courses


4 hours of lectures and 2 hours of lab work (Circuit design lab). Some of the teaching will be given as supervision in labs / exercise classes. Mandatory assignments must be approved prior to the exam.

Access to foundry Process Design Kits (PDKs) require students to sign an NDA.


The course grade is based on the following assessments:

  • project assignment with presentation (40%)

  • final exam (60%), oral/written.

Both parts of the exam must be passed and must be passed in the same semester.

This course has mandatory assignments that must be approved prior to the exam.


The final exam will be an oral or 4 hours written exam depending on the number of course attendees. The project assignment must be presented for the class and teaching staff.

It will also be counted as one of your three attempts to sit the exam for this course, if you sit the exam for one of the following courses: IN9180.

Examination support material

All printed and written resources are allowed.

Language of examination

The examination text is given in English, and you submit your response in English.

Grading scale

Grades are awarded on a scale from A to F, where A is the best grade and F is a fail. Read more about the grading system.

Resit an examination

Students who can document a valid reason for absence from the regular examination are offered a postponed examination at the beginning of the next semester. Re-scheduled examinations are not offered to students who withdraw during, or did not pass the original examination.

Special examination arrangements, use of sources, explanations and appeals

See more about examinations at UiO

Last updated from FS (Common Student System) May 27, 2022 6:21:16 AM

Facts about this course

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