IN5200 – Advanced Digital System Design

Schedule, syllabus and examination date

Choose semester

Changes in the course due to coronavirus

Autumn 2020 we plan for teaching and examinations to be conducted as described in the course description and on semester pages. However, changes may occur due to the corona situation. You will receive notifications about any changes at the semester page and/or in Canvas.

Spring 2020: Teaching and examinations was digitilized. See changes and common guidelines for exams at the MN faculty spring 2020.

Course content

The course provides an in-depth coverage of systematic development, simulation and synthesis of advanced Digital System-on-Chip (SoC) integrated circuits with emphasis on FPGA (Field Programmable Gate Array) technology. Lab assignments provide hands-on experience in how SoC design is simulated and implemented in FPGA hardware.

Learning outcome

After taking this course you'll:

  • have an in-depth knowledge of digital integrated circuit hardware design. The emphasis is on FPGA technology, but most of the design techniques can also be applied to ASIC devices.
  • be familiar with the latest state-of-the-art system on chip (SoC) design methodologies, including advanced functional verification, high-level synthesis and partial run-time reconfiguration of FPGA.
  • learn the benefits and drawbacks of the various design methods for solving a problem.
  • have knowledge in both using design tools as well as designing and debugging SoC circuits in FPGA technology.
  • have the knowledge to perform advanced simulation and synthesis of digital systems
  • be able to perform advanced implementation and analysis techniques

Admission to the course

Students who are admitted to study programmes at UiO must each semester register which courses and exams they wish to sign up for in Studentweb.

If you are not already enrolled as a student at UiO, please see our information about admission requirements and procedures.

Experience with digital integrated circuit design, VHDL and FPGA technology (e.g. from IN3160 – Digital system design ) is highly recommended.

Overlapping courses

Teaching

Up to 4 hours of lectures/group exercises each week.  Mandatory lab assignments must be completed during the course.

Examination

Oral exam. All mandatory assignments must be approved prior to the exam.

It will also be counted as one of your three attempts to sit the exam for this course, if you sit the exam for one of the following courses: INF5430 – Advanced digital systems design (continued)INF9430 – Advanced digital systems design (continued)IN9200 – Advanced Digital System Design

Grading scale

Grades are awarded on a scale from A to F, where A is the best grade and F is a fail. Read more about the grading system.

Resit an examination

Students who can document a valid reason for absence from the regular examination are offered a postponed examination at the beginning of the next semester.

Re-scheduled examinations are not offered to students who withdraw during, or did not pass the original examination.

Special examination arrangements, use of sources, explanations and appeals

See more about examinations at UiO

Last updated from FS (Common Student System) Sep. 22, 2020 1:15:11 PM

Facts about this course

Credits
10
Level
Master
Teaching
Autumn
Examination
Autumn
Teaching language
Norwegian (English on request)