FYS9220 – Real Time and Embedded Data Systems
Schedule, syllabus and examination date
This course gives and introduction to the design of digital and embedded systems using programmable logic (FPGA technology). This includes hardware description language (VHDL), verification and testing of digital designs, implementation of embedded systems in FPGAs, and the basic properties of Real-time operating systems.
After completing this course:
- you will have good knowledge of the building blocks and functionality of programmable logic devices
- you will have good knowledge of application areas for programmable logic devices
- you will be able to design a basic digital system using a hardware description language like VHDL
- you will be able to perform advanced simulation and synthesis of digital systems for FPGAs
- you will have good knowledge of embedded and Real-Time operating systems, and be able to implement them on an FPGA
PhD candidates from the University of Oslo should apply for classes and register for examinations through Studentweb.
If a course has limited intake capacity, priority will be given to PhD candidates who follow an individual education plan where this particular course is included. Some national researchers’ schools may have specific rules for ranking applicants for courses with limited intake capacity.
PhD candidates who have been admitted to another higher education institution must apply for a position as a visiting student within a given deadline.
Recommended previous knowledge
FYS1210 – Elementary Electronics with Project Work og knowledge of at least one high level programming language. FYS3230 – Sensors and measurement technology (continued), FYS3231 – Sensors and measurement technology and FYS3240 – Data Acquisition and Control are also recommended.
10 credits overlap with FYS4220 – Real Time and Embedded Data Systems
The first lecture is mandatory. If you are unable to attend, the Department of Physics has to be informed no later than the same day (e-mail email@example.com), or else you will lose your place in the course.
The course extends over a full semester with 2 hours of lectures and 2 hours lab per week.
You are recquired to complete five mandatory laboratory assignments to take the final exam.
Ph.d. candidates will in comparison to the masterstudents in the cloned version of the course (FYS4220 – Real Time and Embedded Data Systems) be required to complete more extensive mandatory assignments or a bigger FPGA project.
As the teaching involves laboratory and/or field work, you should consider taking out a separate travel and personal risk insurance. Read about your insurance cover as a student.
The five mandatory laboratory assignments or a bigger FPGA project must be approved in order to qualify for the final exam.
The final oral or written exam (4 hours) counts for 100% of your final grade. The form of the exam is decided by the number of students signed up for the course after the deadline.
Language of examination
Subjects taught in English will only offer the exam paper in English.
You may write your examination paper in Norwegian, Swedish, Danish or English.
Grades are awarded on a pass/fail scale. Read more about the grading system.
Explanations and appeals
Resit an examination
This course offers both postponed and resit of examination. Read more:
Special examination arrangements
Application form, deadline and requirements for special examination arrangements.
The course is subject to continuous evaluation. At regular intervals we also ask students to participate in a more comprehensive evaluation.